ASIC Design Verification Engineer
AvicenaTechSunnyvaletoday
About the job
ASIC Design Verification Engineer role at AvicenaTech in Sunnyvale, USA. Focus on semiconductors verification using SystemVerilog, Python, Perl, and Verilog
Requirements
- systemverilog
- python
- perl
- verilog
Source: Telegram channel RVC | Global | IT Job - Remote & Relocation
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