Entry Level ASIC/FPGA Design Verification Engineer
Boeing79k - 106.9k USDEl Segundotoday
About the job
Junior level ASIC/FPGA Design Verification Engineer role at Boeing, focused on hardware verification and design validation
Requirements
- systemverilog
- python
- perl
- make
- git
- linux
Source: Telegram channel RVC | СНГ | IT Job - Remote & Relocation
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